A semiconductor device with a circuit, such as an active-matrix substrate, ordinarily has a built-in circuit for protecting semiconductor components in that circuit from ESD. Such a protection circuit is called an “ESD protection circuit”.
A general ESD protection circuit will be described with reference to FIG. 35, which illustrates an exemplary ESD protection circuit provided for an IC internal circuit with a CMOS (complementary metal oxide semiconductor) structure. The ESD protection circuit shown in FIG. 35 includes a protective resistor R, which is arranged between an input terminal and the CMOS structure, and two protection diodes D1 and D2 with mutually different polarities. Each of these two diodes D1 and D2 is connected to the input signal line of the CMOS structure.
In the ESD protection circuit, when the input terminal receives static electricity, its potential either rises (+) or falls (−). If the potential rises (+), the protection diode D1 turns ON and pushes positive charges to a VCC line. On the other hand, if the potential falls (−), the protection diode D2 turns ON and pushes negative charges to a VSS line. In this case, the direction of the current flowing is regulated by the protective resistor R.
On the active-matrix substrate of a display device, a circuit including thin-film transistors (TFTs), which function as switching elements for pixels, is usually formed by patterning a semiconductor film of silicon, metal oxide semiconductor, or any other suitable material. Also, the active-matrix substrate normally has a protection circuit in order to prevent those TFTs or interconnects from getting damaged by static electricity (see Patent Document No. 1, for example).
FIG. 36 illustrates a conventional active-matrix substrate with protection circuits. This configuration is disclosed in Patent Document No. 1.
As shown in FIG. 36, the active-matrix substrate has an array of thin-film transistors 240, which includes a number of scan lines 203 and a number of signal lines 204 that have been formed on an insulating substrate and a number of thin-film transistors 205 that are arranged at their intersections. Each of those thin-film transistors 205 has its source electrode, gate electrode and drain electrode connected to its associated signal line 204, its associated scan line 203, and its associated pixel electrode (not shown), respectively. Around this array of thin-film transistors 240, each scan line 203 is connected to a reference potential line 231 via its associated protection circuit 250. Each protection circuit 250 includes two thin-film diodes 228 and 229 with mutually different polarities. Likewise, each signal line 204 is also connected to a reference potential line 232 via its associated protection circuit 251. According to such a configuration, even if positive or negative charges are applied to either a scan line 203 or a signal line 204, the protection circuit 250 or 251 can push those charges to its associated reference potential line 231 or 232.
It should be noted that each of the thin-film diodes 226 through 229, which are included in the protection circuits 250 and 251 shown in FIG. 36, has a structure in which the source and gate of a thin-film transistor (e.g., a pixel thin-film transistor 205) are short-circuited together. A diode with such a structure in which the gate and source or drain of a thin-film transistor are short-circuited together will be referred to herein as a “three-terminal diode”.
Furthermore, it has recently become more and more often that not only such thin-film transistors functioning as switching elements but also some or all of TFTs for use in a peripheral circuit such as a driver are arranged on an active-matrix substrate. The peripheral circuit is not located in an area of the active-matrix substrate where pixels are arranged (which will be referred to herein as a “display area”) but in another area of the active-matrix substrate (which will be referred to herein as a “frame area”). In that case, protection circuits also need to be provided for those elements such as thin-film transistors that form the peripheral circuit (see Patent Document No. 2, for example).
FIG. 37 illustrates an insulated gate transistor circuit, which is provided to apply a clock signal to a driver that is arranged in the frame area of an active-matrix substrate. The circuit configuration shown in FIG. 37 is disclosed in Patent Document No. 2.
The circuit shown in FIG. 37 includes an insulated gate transistor circuit 1001, which is arranged between an electrode pad (OLD pad) 1011 that receives a clock signal and a driver circuit section, and two protection circuits 1013 and 1016. The protection circuit 1013 is arranged at the input end of the circuit 1001 and includes two diodes 1014 and 1015 with mutually opposite polarities. On the other hand, the protection circuit 1016 is arranged at the output end of the circuit 1001 and includes two diodes 1017 and 1018 with mutually opposite polarities. The diodes 1014 and 1017 are connected to a VDD line, while the diodes 1015 and 1018 are grounded. According to such a configuration, the static electricity that has been externally applied to a line 1019 through the CLB pad 1011 can be discharged by the protection circuit 1013 and the static electricity that has been applied from the driver circuit to the line 1019 can be discharged by the protection circuit 1016.
As can be seen from the examples illustrated in FIGS. 35, 36 and 37, the conventional ESD protection circuits are provided mainly for the purpose of protecting a three-terminal thin-film transistor. Also, each of those ESD protection circuits includes at least two diodes with mutually opposite polarities, which are forward-biased and reverse-biased, respectively, so as to push away the charges applied to the line to protect, no matter whether the charges are positive or negative. Furthermore, that ESD protection circuit is arranged on either the input or output end of a circuit including thin-film transistors to protect or even on both ends thereof. That is why the ESD protection circuit can prevent static electricity from entering a circuit with three-terminal thin-film transistors on an insulating substrate through either the input or output end thereof. Consequently, by providing such a protection circuit for an active-matrix-addressed display device, for example, the protection circuit can prevent static electricity from entering a driver circuit in the frame area (which may be a monolithic driver) from an external connector pad (which is connected to the driver at the input end), a scan line, or a signal line (which is located at the output end of the driver).